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  Datasheet File OCR Text:
 SEMICONDUCTOR
CD54AC161/3A CD54ACT161/3A
Functional Diagram
P0 3 SPE CP MR PE TE 9 2 1 7 10 4 P1 5 P2 6 14 13 12 11 15 Q0 Q1 Q2 Q3 TC P3
June 1997
COMPLETE DATA SHEET COMING SOON! Synchronous Presettable Binary Counters
Description
The CD54AC161/3A and CD54ACT161/3A are synchronous presettable binary counters that utilize the Harris Advanced CMOS Logic technology. The CD54AC161/3A and CD54ACT161/3A are asynchronously reset. Counting and parallel presetting are both accomplished synchronously with the negative-to-positive transition of the clock. A LOW level on the Synchronous Parallel Enable input, SPE, disables the counting operation and allows data at the P0 to P3 inputs to be loaded into the counter (provided that the setup and hold requirements for SPE are met). The counters are reset with a LOW level on the Master Reset input, MR. Two count enables, PE and TE, in each counter are provided for n-bit cascading. Reset action occurs regardless of the level of the SPE, PE, TE and CP inputs. The look-ahead carry feature simplifies serial cascading of the counters. Both count enable inputs (PE and TE) must be HIGH to count. The TE input is gated with the Q outputs of all four stages so that at the maximum count, the terminal count (TC) output goes HIGH for one clock period. This TC pulse is used to enable the next cascaded stage. The CD54AC161/3A and CD54ACT161/3A are supplied in 16 lead dual-in-line ceramic packages (F suffix).
GND = 8 VCC = 16
ACT INPUT LOAD TABLE INPUT Pn CP MR, TE SPE PE NOTE: 1. Unit load is ICC limit specified in DC Electrical Specifications Table, e.g., 2.4mA Max at +25oC. UNIT LOAD (NOTE 1) 0.13 1 0.83 0.67 0.5
Absolute Maximum Ratings
DC Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +6V DC Input Diode Current, IIK For VI < -0.5V or VI > VCC + 0.5V . . . . . . . . . . . . . . . . . . . . . .20mA DC Output Diode Current, IOK For VO < -0.5V or VO > VCC + 0.5V . . . . . . . . . . . . . . . . . . . . .50mA DC Output Source or Sink Current, Per Output Pin, IO For VO > -0.5V or VO < VCC + 0.5V . . . . . . . . . . . . . . . . . . . . .50mA DC VCC or GND Current, ICC or IGND For Up to 4 Outputs Per Device, Add 25mA For Each Additional Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .100mA Power Dissipation Per Package, PD TA = -55oC to +100oC (Package F) . . . . . . . . . . . . . . . . . . 500mW TA = +100oC to +125oC (Package F) . . . . . . . . Derate Linearly at 8mW/ oC to 300mW Operating Temperature Range, TA Package Type F . . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to +125oC Storage Temperature, TSTG . . . . . . . . . . . . . . . . . . -65oC to +150oC Lead Temperature (During Soldering) At Distance 1/16in. 1/32in. (1.59mm 0.79mm) From Case For 10s Max . . . . . . . . . . . . . . . . . . . . . . . . . . +265oC Unit Inserted Into a PC Board (Min Thickness 1/16in., 1.59mm) With Solder Contacting Lead Tips Only. . . . . . . . . . . . . . . +300oC
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Recommended Operating Conditions
Supply Voltage Range, VCC Unless Otherwise Specified, All Voltages Referenced to GND TA = Full Package Temperature Range CD54AC Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.5V to 5.5V CD54ACT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V DC Input or Output Voltage, VI, VO . . . . . . . . . . . . . . . . . . 0V to VCC Operating Temperature, TA . . . . . . . . . . . . . . . . . . . -55oC to +125oC Input Rise and Fall Slew Rate, dt/dv at 1.5V to 3V (AC Types) . . . . . . . . . . . . . . . . . . . 0ns/V to 50ns/V at 3.6V to 5.5V (AC Types) . . . . . . . . . . . . . . . . . 0ns/V to 20ns/V at 4.5V to 5.5V (AC Types) . . . . . . . . . . . . . . . . . 0ns/V to 10ns/V
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper I.C. Handling Procedures. Copyright
(c) Harris Corporation 1994
File Number
3892
1


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